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Altera_Forum
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15 years ago

Frame buffer IP

We use 2 frame buffer IPs in our design. 1- The first frame buffer: takes its data (din) from DVI Input IP (VGA_IN_INST) and writes this data into an SDRAM through the SDRAM controller. We d...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thank you for your reply.

Usually, one Frame Buffer is used for reading & writing operations. However, I want to separate the reading apart from the writing using 2 different Frame Buffers because there is some processing required after the writing and before the reading (Ethernet TX&RX). This is shown in the attached brief block diagram.

1- Please confirm that: this block diagram is suitable for testing purposes.

2- If it is suitable, how can we choose the SDRAM address for reading and writing operations done by the Frame Buffer and SGDMA?