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Altera_Forum
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10 years ago

[FPGA-to-SDRAM Avalon-MM Bridge] -> beginbursttransfer is missing...

Hi All, I'm working with the ArriaV device and going to use the FPGA-to-SDRAM Avalon-MM Bridge. Does the FPGA-to-SDRAM Avalon-MM Bridge support the burst transactions? After enablin...
Altera_Forum's avatar
Altera_Forum
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10 years ago

I would think it would support burst transactions. The latest Avalon Manual suggests that the "beginbursttransfer" signal is deprecated. On page 3-8 of said manual it says in describing the signal "Altera recommends that you do not use this

signal. This signal exists to support legacy memory controllers." (which, incidentally, includes the v15.1 Multi-Port Front-End controller which does have a beginbursttransfer signal. :-)

I think it assumes you're doing a burst if you've set burstcount appropriately. It will capture the signal on the first cycle that "read" or "write" are set.

Cheers.