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Altera_Forum
Honored Contributor
Honored ContributorFPGA-to-HPS bridge, too slow?
Hi, my co-worker is using the Cyclone V with the embedded ARM cores. I often stop by his cube and ask him his opinion of the SoC. His biggest complaint is the FPGA-to-HPS bridge which he says is a bi...
Altera_ForumHonored Contributor
Honored ContributorHi, how did you confirm if the data congestion is came from the side that is entering or exit the bridge? how did you measure the simulated data flow?
