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These are the steps that I carried out:
1- I have put the four files (s2_dsp,hex_display,synth,pinout) together in one folder and called it s2_dsp
2- Created a Quartus project with name "s2_dsp"
3- In the tcl console I wrote tcl> source scripts/synth.tcl
Am I missing any steps ?
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The zip file has a readme.txt that explains what you were supposed to do.
You did not need to create a Quartus project. The script does everything. Here's what you were supposed to do:
Stratix II DSP Development Kit 'basic' Design
---------------------------------------------
4/17/2014 D. W. Hawkins (dwh@ovro.caltech.edu)
A user on the Altera Forum asked about the pinout for this
board. I created this stripped down 'basic' design from
my code repo. The design was synthesis tested using
Quartus 12.1sp1 subscription edition.
There is no SDC file for this project, so Quartus generates
a warning.
To synthesize the design;
1. Unzip this file
eg., c:/temp/s2_dsp_basic
2. Start Quartus and select the Tcl console
(make it visible with View->Utility Windows->Tcl Console)
3. Run the synthesis script
tcl> cd c:/temp/s2_dsp_basic
tcl> source scripts/synth.tcl
Synthesizing the S2-DSP 'basic' design
--------------------------------------
- Creating the Quartus work directory
- Creating the VHDL files list
- Applying constraints
- Processing the design
- Processing completed
NOTE: The earlier version of this kit shipped with "ES"
devices (engineering samples). The synth.tcl script
assumes you have a production device (non-ES) .Edit that
script if you have an ES board.
Enjoy!
Cheers,
Dave
Cheers,
Dave
Honored Contributor
