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Altera_Forum's avatar
Altera_Forum
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11 years ago

FPGA partial reconfiguration granularity

excuse me. in altera PR user guider, it usually specified one column to be the Partial reconfiguration region? could I ask you a question, what is the minimum granularity in the board? Is on...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Ok, I think we (or just me) are having some naming confusion here. I understand a column as being a single column of LABs or DSPs or memory cells, etc. I understand a CRAM frame as being composed of one or more (here's the catch, I don't know this quantity) of these columns. Anyone that has better understanding about this should take a look on our discussion.

What I know is that independent of your logiclock size, the partial bitstream is always a multiple of CRAM frames, with the size and reconf. time depending on which mode you use for your bitstream (SCRUB for non-vertically-overlapping PR regions but half the size, or AND/OR for vertically-overlapping PR regions). In other words, there's no way of reconfiguring just a portion of a CRAM frame. I've understood this from the Partial Reconfiguration Online Course available @ Altera's website.

Please anyone correct me if I'm wrong, I've entered this PR world this month :P