FPGA Initialization / Reset

At the conclusion of programming of all devices (except Hyperflex devices; see below), all outputs are initialized low. So it's highly recommended to have a reset scheme to set things correctly. Depending on the way the design is written, initialized registers in code can go high, but this will be after everything starts low.

Hyperflex devices (Stratix 10, Agilex) do have the ability to have outputs initialized high from device programming so you may be able to get away without design reset, but it's still recommended to do it.