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Altera_Forum's avatar
Altera_Forum
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10 years ago

FPGA full reconfiguration using MAX II CPLD

Hi all, I am trying to command full FPGA configuration using MAX II CPLD embedded on the Transceiver Signal Integrity Development Kit with Stratix V. In the documentation the S5 (connected...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I took the "d" for "ll" somehow, sorry :)

When I get some feedback I'll post it here.