Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

FPGA full reconfiguration using MAX II CPLD

Hi all, I am trying to command full FPGA configuration using MAX II CPLD embedded on the Transceiver Signal Integrity Development Kit with Stratix V. In the documentation the S5 (connected...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi Alex,

Thanks for the reply and don't worry, it doesn't sound as teaching me at all. That is the only way to solve the problem so please feel free to ask me whatever you find important.

Yes, that was the first thing I tried and I still couldn't perform the reconfiguration. I have a simple design running in the FPGA controling a pair of leds. When pressing the button (which is connected to the reset_generator in my version of the RTL) nothing happens and I find it impossible that a reconfiguration process so fast that I can't notice the leds turning off for at least a second.

Also, when pressing the button on board power up it seems that the configuration is not affected at all.

Thanks for the ticket. If you get the some results please let me know. Just take into account that just connecting reset_in => nRESET is not a solution to the problem.

Cheers,

Filip