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Altera_Forum's avatar
Altera_Forum
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10 years ago

FPGA full reconfiguration using MAX II CPLD

Hi all, I am trying to command full FPGA configuration using MAX II CPLD embedded on the Transceiver Signal Integrity Development Kit with Stratix V. In the documentation the S5 (connected...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi Alex,

Actually, that is exactly what I want. The only problem is It doesn't work! I downloaded the MAX II RTL source code (kit installation : https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-transceiver-si-stratix-v.html) and the signal related to the push button is not even connected to the rest of the design.

The first thing I tried is to simply connect this signal to the reset generator module which generates the reset signal for the rest of the modules but I couldn't reconfigure the FPGA. Then I performed several modifications in other modules trying to use pfl_nreconfigure(pfl_control module) or srst (fgpa_interface <-> pfl_control modules) signals in order to perform this reset using the S5 push button but nothing worked.

Since the SRST button is disabled even in the Board Test System GUI I am wondering if it is even possible to perform this reconfiguration from the flash memory as documented in the user and reference manuals for the board.

Cheers,

Filip