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Altera_Forum's avatar
Altera_Forum
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17 years ago

FPGA Configuration using CPLD!

Hi all, I have a question need your precious comments. As I create my pcb with a Arria and MAXII. I planned to use Paralle Flash Loader in CPLD to configurate Arria. After following AN3...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

I try to simulate your design. First the PFL access address 0x20040, where pof version locates, then the address points 0x20041 but it means nothing.

If you have modeslsim-AE verilog licence, I will upload the testbench.