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Altera_Forum
Honored Contributor
17 years agoFPGA Configuration using CPLD!
Hi all, I have a question need your precious comments. As I create my pcb with a Arria and MAXII. I planned to use Paralle Flash Loader in CPLD to configurate Arria. After following AN3...
Altera_Forum
Honored Contributor
17 years agoHi Gee,
Thanks for your comments. I will try your suggestion later. And I want to share you how I download my FPGA image to flash. I used to use this PFL function as described in AN478 in Arria. But it failed writing to flash and I don't know why at that time. Later I use CFI interface after initiate a NIOSII and download it using NIOSII EDS and it works. I also read that data using NIOSII command shell and measure the address pattern. Through that I found the output of PFL is not correct for flash to work properly. I will repeat my test on PFL using Arria. Thanks for your reply. BRs, Johnson