FPGA configuration time and PCIe secification

--- Quote Start ---

am wondering if there is some race between the training and the BIOS comming up ?

--- Quote End ---

If you were able to build the design, then try adding a SignalTap II instance and probing PCI RST#.

Perform a warm reboot of your system, and you should see a rising-edge on RST#. That indicates your FPGA was alive before the BIOS attempted to enumerate, so the issue is not a race condition.

If you can get the card to boot ok on warm reboot, but not at power-on, then you might have a race condition.

Cheers,

Dave