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Honored Contributor
Honored ContributorFPGA configuration time and PCIe secification
Has anyone used the PCIe interface of a Cyclone device while configuring it using the AS (active serial) scheme? I'm using a Cyclone IV device (EP4CGX30F484) and planning to use its PCIe interf...
Altera_ForumHonored Contributor
Honored Contributorthought i'd throw out another alternative: Cyclone V and autonomous HIP. this configures the FPGA via AS in 2 stages, the periphery and the core. loading the periphery first allows you to meet PCIe specs, then the FPGA goes out and reads the core image:
http://www.altera.com/literature/ug/ug_cvp.pdf
