Forum Discussion
Altera_Forum
Honored Contributor
17 years agoHi Jake, Thanx
here are the answers for your questions:- 1) My board is Stratix II GX PCIe development kit. 2) I have tried with both PS and FPP schemes. 3) Please explain on MSEL pins and how to actually set them.... 4) Whatever signals I have got in Parallel Flash Loader megafunction, I have just mapped those to the MAX device. They may be correct otherwise howcome the Flash is getting programmed! 5) Yes I am able to program the FPGA through JTAG. Also, I have a bit confusion while setting the "Option Bit" address, while generating the PFL megacore and setting the address while converting design sof to flash pof. What actually is the relation between the two addresses? -Amit