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Altera_Forum
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13 years ago

FPGA architecture

Hi all, I'm starting a new project and I need some help with the FPGA architecture. The concept is very simple - the FPGA will sample an input parallel bus (24 or 48 signals @ 150MHz max) and stre...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

The PCIe IP cores, either from PLDA or Altera, are quite expensive. Saving the invest and hopefully FPGA resources and compilation time are main motivations to go for hard IP.

A 4-lane Cyclone IV GX PCIe interface has a nominal throughput of 8 GBPS.