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Altera_Forum
Honored Contributor
Honored ContributorFPGA architecture
Hi all, I'm starting a new project and I need some help with the FPGA architecture. The concept is very simple - the FPGA will sample an input parallel bus (24 or 48 signals @ 150MHz max) and stre...
Altera_ForumHonored Contributor
Honored ContributorAs far as I'm aware of, the Altera PCIe core is originated from PLDA. So why don't you want to use the Altera core, or at least the evaluation version for test?
O.K., if you are going for PCIe with external PHY, which is only offered by PLDA directly, you'll need to refer to PLDA. But didn't you say Altera Hard IP? Then you would use the free Altera Megafunction.
