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Altera_Forum
Honored Contributor
10 years agoFloating point addition in vhdl
Hii I want to add 4 floating point no.what will be the result range.I am using library ieee_proposed; use ieee_proposed.fixed_pkg.all; this package.For example if I want to add two floating...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Algorithmically yes - but not syntactically. Each addition in the fixed point library increases the bit size. --- Quote End --- I haven't used fixed-point types yet. But if we do it as you said: break it down into multiple 2 input additions:
result := (a + b) + (c + d) 2 bits extra will suffice.