Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThanks kaz,
Yeah, we would like to move DSP C code to verilog. Most DSP code was written in C (pointers & floating point). I can use SystemVerilog (real) type, so I can see my data in modelsim. But my goal is to verilog only, Can I do it? SystemVerilog: real preamble_p[64]; // Works great Verilog: wire signed [31:0] preamble_p[64]; ???????