Float to Fixed Point in FPGA

you need to add the lpm libraries to modelsim. Modelsim Altera should have them already included.

The fixed package you're talking about is a great package to use when you've got values in fixed point. It can get confusing tracking integer and fractional bits in an integer. (like kaz says, you represent 0 to 1 with 0 to 511, but all bits are fractional).

The fixed package allows you declare types that take care of the integer and fractional bits for you, so for the above example, the VHDL is difference, but the logic in the FPGA is identical:

in "integer" form:

signal my_fixed : unsigned(9 downto 0);

my_fixed <= input + 256; --256 = 0.5 in 10 bit fixed point of range 0 to 1;

alternatively:

signal my_fixed : ufixed(-1 downto -10);

my_fixed <= input + to_ufixed(0.5, -1, -10); --It makes code SOO much easier to read.

But if all your inputs are floating point, you will need the float->fixed altera IP block. But once you've got the output from that you can work with the fixed point library