Altera_Forum
Honored Contributor
13 years agoflash read/write
Hello, I am trying to read/write the flash memory of my DE0 development board with the next VHDL code but I am unable to store nothing in the memory. Can anybody help me?
-- Quartus II VHDL Template -- Single port RAM with single read/write address library ieee; use ieee.std_logic_1164.all; entity flashdriver is port ( clk : in std_logic; datain : in std_logic_vector(15 downto 0); we : in std_logic; ready : in std_logic; q : inout std_logic_vector(15 downto 0); dataout : out std_logic_vector(15 downto 0); nce : out std_logic; noe : out std_logic; nbyte : out std_logic; nrst : out std_logic; nwe : out std_logic; nwp : out std_logic ); end entity; architecture rtl of flashdriver is type state_type is (iddle,reada,writea); -- Register to hold the current state signal state : state_type; begin process (clk) begin process(clk) begin if(rising_edge(clk)) then if (we = '1') then nce<='0';noe<='1';nwe<='0'; q <= datain; else nce<='0';noe<='0';nwe<='1'; dataout <= q; end if; end if; end process; nbyte<='1'; nrst<='1'; nwp<='1'; end rtl;