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Altera_Forum
Honored Contributor
Honored ContributorFlash EPC64, slow to program
Hello,
We use on our board EPC64 flashes to store the pof file for the stratix 2. This take about 10 minutes to upload the pof; This is slow. When the sof is uploaded with the same usb blaster, it takes 5 seconds, so clearly the flash is the limiting factor. As we will move to stratix 3 which are two times bigger, I expect bigger pofs as well, and I guess that programming the flash will take ages. Is Altera aware of this problem, and will they propose an equivalent to the EPC64 (easy to integrate) but much faster ?14 Replies
Altera_ForumBy the way, I remember speed for Altera config is
Byteblaster > USBblaster > MasterBlaster- Altera_Forum
Just did measure for you.
it's 6ms clock period for 166.7Hz as my experiment... I'm not sure if it's computer/environment dependent. of course, the sum of clk period must also add erase time and program time. - Altera_Forum
what is the epc64 clock when the usb blaster is used to flash it ?
- Altera_Forum
Chip Erase time typical for 64M is 1 min.
Program depands on clock rate when clock is too slow. Typical is about 1~2ms for 256byte. Page Program 256byte is equal to 8(cmd) + 24(adr) + 8x256 = 2080 clk - Altera_Forum
Here the real figures :
1 min to erase, 3 min to program. - Altera_Forum
Hi,
There is actually a misunderstanding here. The time is long to program the EPC64, not to program the fpga from the EPC64 (that is fast and takes about 1 second). I think that the flash EPC64 is really slow, because programming the sof corresponding to the pof takes only 3 seconds with the same usb blaster. - Altera_Forum
I use compressed bitstreams.
I think I use 10 Mhz. I will check the signals if they matches the spec. Thank you. Erase time takes about 1 minute. - Altera_Forum
10 minutes to config from a serial device is totally unreasonable, if you read the Config Handbook, "Estimating Active Serial Configuration Time" section you can calculate what the reasonable times are for your device size.
Maybe there is a problem with your hardware? Use a scope to check the config pins on the FPGA if possible (CONF_DONE, INIT_DONE, nSTATUS, nCONFIG) and see if they match the waveforms in the datasheet. If you see nSTATUS flicking high-low repeatedly (you should have access to it since it requires an external pull-up), it means you have a config error, maybe bitstream corruption. Make sure you use compressed bitstreams, also you can try a 40MHz config clock. Check the enable user-supplied startup clock in Quartus device options (should be disabled) and the CLKUSR pin (should be tied to GND if not used as an I/O). - Altera_Forum--- Quote Start --- It is slow. But so slow as 10monutes is not reasonable. In my EP2S180 board, the EPCS64 programming time is about 50sec. --- Quote End --- Well, I guess that your fpga is not fully used, is it ? If you are using 10% or 70 % of the fpga, the program time is different.
- Altera_Forum
It is slow. But so slow as 10monutes is not reasonable. In my EP2S180 board, the EPCS64 programming time is about 50sec.
