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gschorcht's avatar
gschorcht
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4 years ago

Fitter can't fit a small design in Cyclone V SE that fits in a much smaller Cyclone IV device

Hi, When I try to compile a design for a Cyclone V 5CSEMA5 that works perfectly on a much smaller Cyclone IV, the fitter says: Info (170195): Router estimated average interconnect usage is 2% ...
gschorcht's avatar
gschorcht
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4 years ago

Hi Richard,

I am really stumped and have no idea what I am doing wrong.

  • I have reduced the design to an absolute minimum so that the logic utilization is only 282/32070 ( < 1%) but the routing problem is still reproducible.
  • During fitter process, the router shows an estimated average interrconnect usage of 0% and an estimated peak interconnect usage of only 7%.
  • In the Chip Planner no routing congestions are shown, the maximum routing utilization is 68 %, see the screenshot attached. There doesn't seem to be any congestion.
  • I have neither timing contraints nor assignment constraints, so the fitter has a maximum degree of freedom.
  • Enabling the Fitter Aggressive Routability Optimizations logic option doesn't help.
  • I can't generate a Global Router Wire Utilization Map with Quartus II Lite 20.1 for Cyclone V (at least I didn't find a way in the Quartus Help).

I don't know whats wrong with my design and how it could be solved. It just contains about 100 wires that are shared by two modules. The design can be found attached.

Any help is welcome. As mentioned earlier, the original and much larger design works perfectly on a much smaller Cyclone IV.

Regards
Gunar