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alperenpalp's avatar
alperenpalp
Icon for New Contributor rankNew Contributor
5 years ago
Solved

FIR II core IP outputs incorrect data.

Hello, It's my first time using intel's FIR filter IP and I'm having difficulties getting it working. I basically want to low-pass filter the data coming from the ADC (LTC2387) using FIR II IP. T...
  • CheepinC_altera's avatar
    CheepinC_altera
    5 years ago

    Hi,

    Would you mind to help opening a new thread on this. Thank you very much.

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Regarding your latest inquiries, as I understand it from the Figure 13. Time-Division Multiplexing to Save Hardware Resources in user guide, yes, the IP is expecting you to feed serialized data from 2 channels when your clock rate is 2x of sample rate.


Please let me know if there is any concern. Thank you.



Best regards,

Chee Pin


alperenpalp's avatar
alperenpalp
Icon for New Contributor rankNew Contributor
5 years ago

OK that's kind of clear for me right now.

What about the interpolation filters? I set the input sample rate to 100MSPS and clock rate to 100MHz. I get 74bits of output for every clock cycle. I assume each output value represents two samples, is that correct?

If it is true, could you tell me which part of the output is the first output? Lower part or the upper part?

Thanks!