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12 years agoIn my filter Input sample rate much less than Clock frequency, thats why all 11 channels can pass through 1 wire.
Filter characteristics: PhysChanIn 1, PhysChanOut 1, ChansPerPhyIn 12, ChansPerPhyOut 12, OutputFullBitWidth 58, Bankcount 1, CoefBitWidth 20 In this case we have Start of packet and End of packet wires. (http://www.altera.com/literature/ug/ug_fir_compiler_ii.pdf Table 4–2 page 4–23) Better picture of how it works is Figure 4–5.