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Altera_Forum's avatar
Altera_Forum
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12 years ago

FIR Compiler and FIR feedback filter.

Hello guys, Today I'm trying implementing a FIR feedback in my design with the FIR compiler megafunction. I've created 25 8-bit coefficients and imported them in the FIR compiler tool. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

try set FIR to transposed structure. you may then get less delay as delay stages could be used as pipeline registers between adders.

delay in parallel structure is caused by the addition ladder