Honored ContributorHello friends,
I'm currently working with ALTERA DE2-115 board. I need to know the internal registers of this board's PHY. The PHY is Marvell 88E1111. After searching, I found a product brief. But it hasn't mentioned the map of the registers. Has anyone experienced this? Thanks in advance
Honored ContributorDo you only read PHY registers (MDIO?) or also ethernet data directly ?
>Do you know about the built in feature called :"Packet Generator"? Yes, it is activated by setting some bits in a certain register. I tried that recenctly in a xilinx system but did not succeed. I am about to repeat this on my Altera board now.Honored ContributorI'm currently working on MII (Media Dependent Interface) for receiving data packets.
Exactly...I have the same problem.I mean I set the mentioned bits for activating this Packet Generator, but nothing happened.Honored ContributorMy problem was that I did not know about the reserved bits, I have to maintain. When reading back the bits, I found them all to be Zero. Anyway, when writing them, nothing happend. From the phy data sheet, I learned about the paging technique, which makes the access of registers more complex. I assume, the fault was there.
Honored ContributorI do not change the reserved bits. You know, for enabling 88E1111 Packet Generator you have to write in register 30 page 18
and for accessing reg30 page 18,first you have to write s.th in reg 29. I did all these things, but nothing happens.Honored Contributordear fpgaengineerfrankfurt,
I understood how to trigger this "Packet Generator". If you are interested in knowing that, tell me to explain it.Honored ContributorHonored ContributorGoogle it! Try the first hit
http://en.wikipedia.org/wiki/management_data_input/output
