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Honored Contributor
Honored ContributorFilter & decimation implementation on AD7401
Hello everybody! We have chosen the AD7401 Sigma Delta modulator for our project, translated the Verilog code given by the datasheet into VHDL and are now confused about the results of the simu...
Altera_ForumHonored Contributor
Honored ContributorSorry, you are right - I totally misunderstood you...
Correct, when applying a constant voltage within the recommended or max input values of AD7401, the filter's response should be a stable output representing the applied voltage as described in its datasheet. We had checked such issues in simulation and they had all been solved; in real world we went straight to the actual implementation, which, as already mentioned, worked perfectly. Let's check step by step: You are saying that it is "fluctuating" within a rather broad range, meaning that: 1) it does NOT overflow, correct? 2) it DOES produce an output - does aforementioned range at least include the value that should be the output according to your constant input voltage? 3) have you checked what input you really apply? I mean, maybe your source is unstable, etc. The filter code is correct - it has been simulated and used in a real implementation; as I told you in my previous post (even though having misunderstood you :P), I think it is best for you if you try to look for the error elsewhere first. BR, David
