FIFO Interface

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originally posted by larsen+oct 13 2004, 05:33 am--><div class='quotetop'>quote (larsen @ oct 13 2004, 05:33 am)</div>

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in the software part you have some pretty fancy macros. would it be posible for you to post some code snippets on how they are intended to be used.[/b]

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the register_bit macro is for use in that header only (to save me typing, clutter, and potential errors); it&#39;s# undef&#39;d on the way out.

that said, the other macros defined are all named the standard altera way, e.g. iord_arlut_fifo_interface_regname(base) reads from a register, and iowr_arlut_fifo_interface_regname(base, value) writes to a register. for the bits in the status register, arlut_fifo_interface_status_bitname_ofst is the bit&#39;s offset, and arlut_fifo_interface_status_bitname_msk is the bit mask. for control register bits, change status to control.

<!--quotebegin-larsen@Oct 13 2004, 05:33 AM

interrupt use would also be interesting to see.

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I haven&#39;t written any interrupt-using code for a couple reasons:[list][*] My current application is so memory-constrained that I don&#39;t have interrupts (everything is polled), so I can&#39;t justify writing interrupt handler code I&#39;m not using,

[*] Assumptions would need to be made that would likely not be valid (for example, I could write a HAL character-device driver, but that can&#39;t work when the FIFO width is greater than 8 bits without extraneous word splitting and merging),

[*] The user will be able to write much better (read: more specialized to their application) code than I can, and

[*] I&#39;m still learning SOPC Builder&#39;s and HAL&#39;s way of doing things.

[/list]If you need a starting point for basic uses, I would recommend looking at the Altera Nios UART driver for a starting point. Anything I wrote would look a lot like that.

If you want more specific help, please contact me by email.