Forum Discussion
Tao_jiang
New Contributor
New ContributorF Tile recover clock
hi, according to F tile, the recover clock can only be derived REFCLK_FGT_8/9_P/N, which are matched with Q2 and Q3; if SFP is going to connecting with Q0, how to connect the recover clock from Q0?...
Kshitij_Intel
Frequent Contributor
Frequent ContributorHi,
As mentioned in the user guide "When you enable the FGT CDR Output (RX recovered clock output), you must physically map the corresponding FGT PMA to FGT Quad 2 or 3, and you must physically map the FGT CDR Output (RX recovered clock output) to the FGT reference clock location 8 or 9 (configured as output)."
For more info, please refer 4.4. Guidelines for F-Tile Reference and System PLL Clocks Intel®...
Thank you,
Kshitij Goel
