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Altera_Forum
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12 years ago

Externally clocking ALTLVDS with a large number of channels

I'm attempting to fit a 29 channel ALTLVDS clocked by an external PLL into a EP4SGX70HF35C2 Stratix IV. I get the following error from the fitter: "Error (176143): Project contains fast PLL driving 2...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Yeah, you're correct on the package. This makes sense. Thanks.

The device is a dual-port 14-bit dac, so 28 pairs for data and one for clock. I feel like driving it with 2 PLLs may be asking for trouble, so dropping the lsb is an option.