Forum Discussion
Altera_Forum
Honored Contributor
13 years agoExternally clocking ALTLVDS with a large number of channels
I'm attempting to fit a 29 channel ALTLVDS clocked by an external PLL into a EP4SGX70HF35C2 Stratix IV. I get the following error from the fitter: "Error (176143): Project contains fast PLL driving 2...
Altera_Forum
Honored Contributor
13 years agoIn the SIV handbook search on the table "LVDS Channels Supported in Stratix IV GX Device Row I/O Banks". I assume you're in the 1152 package, which supports 56 TX channels. The problem is that half of them are on the left side and half on the right. The PLLs on the left only drive the left channels and same for right side. So you will physically need two PLLs to drive that many channels. Is it one device that really needs 29 or multiple devices(unlikely since it's an odd number). If it is multiple, then you can split them. If one device, maybe you don't need one of the I/O? I had one user not hook up the LSB.