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Altera_Forum
Honored Contributor
Honored ContributorExceed recommended operating condition
Hi, I'm sorry for making a very low level question. If input signal level of FPGA exceeds the recommended operating conditions, i.e. higher than 3.6V, what will happen? Increase jitter? ...
Altera_ForumHonored Contributor
Honored ContributorPermanent chip damage must be feared, particularly with recent 65-nm technology, used e.g. for Cyclone III. See the detailed discussion of allowable voltage overshoot in Cylone III Device Handbook and AN 447.
