Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Exceed recommended operating condition

Hi, I'm sorry for making a very low level question. If input signal level of FPGA exceeds the recommended operating conditions, i.e. higher than 3.6V, what will happen? Increase jitter? ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Permanent chip damage must be feared, particularly with recent 65-nm technology, used e.g. for Cyclone III. See the detailed discussion of allowable voltage overshoot in Cylone III Device Handbook and AN 447.