Altera_Forum
Honored Contributor
8 years agoError:Single ended input and differential output[IOBUF]
Hi,
I am doing LVDS testing.. Getting input from counter block [for e.g. 4-bit] and passing that input to ALT_IOBUFF_differential. Passing that LVDS differential signal to Cyclone V board. I have tried with schematic block design [number of times :rolleyes: :confused:]. FOr me not working. So i need schematic design for my flow. Can anyone help me. i am stuck for many days. I can attach my schematic diagram but it is not visible. Thanks.