Errors in creating of preloader image

Hi everyone,

A little background: I am trying to get the FPGA2HPS SDRAM bridge working, to write from masters in FPGA to the HPS SDRAM. I'm using an Avalon MM master to write from FPGA. I'm seeing that "waitrequest" signal of MM master is being held high. Due to this MM master is not writing anything on to the FPGA2HPS SDRAM bridge.

After going through this post on here : http://www.alteraforum.com/forum/showthread.php?t=41489&page=3; I got to know that the bridge is in reset. To remove it from reset, I have to re-generate the preloader.

Now, I followed the steps to create the preloader as given in the rocketboards.org site. I'm getting errors when I try to run the makefile. First, it was missing iocsr_config_cyclone5 .h and .c and pll_config.h files in the '/software/spl_bsp/generated' folder. I found them in the u-boot source file folder. After copying it to the 'generated' folder and running make again, it is giving me errors saying "recipe for target 'docproc' , 'subdirs' and 'tools' failed" (3 different errors).

Can someone please help me with this.

On an other note, what is FPGA2HPS bridge used for? I don't understand the concept of slaves in HPS space. A kernel module/an application running in linux constantly polling or looking for interrupt from the FPGA can be a slave?? If so, what base address should the kernel module be mapped to in order to receive data from FPGA2HPS bridge. In other words, I am asking can I read data written on FPGA2HPS bridge just like the HPS2FPGA bridge. The HPS2FPGA bridge(FPGA slaves) is mapped/starts at 0xc0000000, what address does FPGA2HPS bridge is mapped/start at?

Thanks,

Karthik.