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kleaviat's avatar
kleaviat
Icon for New Contributor rankNew Contributor
2 years ago

Error(18210): LogicLock region assignments cannot be used in Quartus Prime Pro Edition. Remove these

Dear, I am currently building an FPGA design in Quartus Pro II ver. 16.0.0, because initial design and its IP cores were created in mentioned version. When we run "FITTER" function of the compilatio...
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RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

We noticed that we haven't received a response from you regarding the latest previous question/reply/answer, and will now transitioning your inquiry to our community support. We apologize for any inconvenience this may cause and we appreciate your understanding.

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