Forum Discussion
kleaviat
New Contributor
New ContributorError(18210): LogicLock region assignments cannot be used in Quartus Prime Pro Edition. Remove these
Dear, I am currently building an FPGA design in Quartus Pro II ver. 16.0.0, because initial design and its IP cores were created in mentioned version. When we run "FITTER" function of the compilatio...
sstrell
Super Contributor
Super ContributorNo, the issue is just what the error says. The format of Logic Lock .qsf assignments changed in Pro at some point IIRC ("Logic Lock Plus"), so just like the error says, you should delete and then recreate your LL assignments using the Logic Lock assignments window and/or Chip Planner.
