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Your design is using too many logic resources. If you post it here, we may be able to help optimize it.
What device family are you using?
Jake
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Hello Jake,
Thanks for your reply. It's NIOSII Stratix 1S10.
I'm following a tutorial by Altera.
http://www.altera.com/literature/tt/tt_nios2_multiprocessor_tutorial.pdf (page 33)
Which part do you want me to copy? It's a design in SOPC Builder. It was generated there successfully, but when I compiled it in Quartus I got this error.
Just so you know, I could compile it at the university lab but I can't using my laptop. I don't think it's a matter of a computer resources, right?
Thanks in advance.
Khalid
Honored Contributor
