Honored Contributor
Honored ContributorHi there,
I think the JTAG I/F should be ok regards voltages and pulls as otherwise the programmer would state a "device not found" or similar message. Additionally you can (or most likely already did) use the "Auto detect" function to check the JTAG itself. If there is anything wrong with the JTAG, the device would not be found at all. Next is (in my opinion) to check, that you have not (unintended) activated the "enablel user supplied start up clock" option (settings => device => device and pin options => General). And even while it may be really stupid to ask this - the target device selected in quartus matches the Cyclone on Hardware? Are there any external Watchdog devices installed that should be "served" to prevent them to reset the FPGA (and if so - is there the required code in the file?) In my opinion (assuming the JTAG I/F is working) this sounds more like some mismatch between the configured device and the hardware... Best regards
