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ErenYagar
New Contributor
New ContributorError (275033) How to handle multi-bit port connections in Verilog and Quartus?
Hello everyone! Recently, I encountered an issue while designing FPGA circuits using Verilog and Quartus, and I would like to seek your advice. I'm trying to connect a multi-bit port, but during com...
sstrell
Super Contributor
Super ContributorAlong with what's mentioned above by others, it looks like your schematic wires are touching the inner block of the symbol, not the I/O connection on the outer rectangle (yet another reason to use HDL instead of schematics). You've done it correctly on the right (notice you can still see the blue I/O).
