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Altera_Forum's avatar
Altera_Forum
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17 years ago

Error (10819)

Hello. I want to generate a simple square wave with the system clock at 135 MHz. The "rechteck_out" vector is interpreted as "Signed(Two's complement)". I get the following error messa...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

A physical register (flip-flop) has a single clock input. The flip-flop only latches data on a single clock edge. You cannot do double-edged clocking.

Jake