EPCS Config via SOPC Builder component in normal user design

Hi,

not too much enthusiasm about this topic it seems ;) .

I've now found this sentence in the documentation:

"The core must be connected to a Nios II processor."

So this sounds like my plan will not work but why should it not work? If I manage to find out how NIOS operates the interface to this component what could be the the problem doing it with a custom VHDL design?

Of course, a problem would be if Quartus just would not synthesize the design for some reason.

Maybe somebody got an idea on this?

Best regards,

flintstone