Forum Discussion
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- wouldn't you expect the FPGA to take over and start toggling the DCLK --- Quote End --- In PS mode, DCLK is controlled by the configuration device. But it's apparently never starting configuration, although all prerequisites are met according to the waveform. Another question: What happens, if you start a configuration manually through EPC16 JTAG interface?