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According to the waveforms, the EPC16 is simply not starting configuration after nSTATUS is deasserted. So I guess, the problem is related to this device rather than the FPGA. The reason for configuration failure can't be explained from the shown waveforms, I think. But it may be probably caused by other EPS16 signals, e. g. an incorrect terminated TCK.
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After the nSTATUS is de-asserted, wouldn't you expect the FPGA to take over and start toggling the DCLK. Once it receives the first frame of data, it will pulldown the INIT_DONE signal.
Good thought about the TCK - I will check.
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