EP3C LVDS : external PLL

Alright, converting dialog to monologue - answering my own question :)

In order to share one PLL between two different TX LVDS blocks you need to apply the same approach as with sharing one PLL between Rx and Tx blocks - connect lvds_0_tx_inst.pll_areset and lvds_1_tx_inst.pll_areset ports to the same reset signal; connect lvds_0_tx_inst.tx_inclock and lvds_1_tx_inst.tx_inclock ports to the same clock source.

In this case the fitter will merge two LVDS TX Plls into one pll, look for "Info: Successfully merged PLL <pll_0> and PLL <pll_1>" message in the processing log