Forum Discussion
RicardoC
Occasional Contributor
2 years agoEnabling HPS JTAG on DK-DEV-AGI027RBES
Hi, The HPS JTAG signals of the Agilex7 device on the DK-DEV-AGI027RBES are directly connected to the MAX10 device. They have been properly setup within Quartus following the IO assignment provided ...
tehjingy_Altera
Regular Contributor
2 years agoHi Ricardo
This you select the arm A53 under the Intel SoC FPGA during the target selection?
Intel SoC FPGA > Agilex > Bare Metal Debug > Debug Cortex-A53_0
Regards
Jingyang, Teh
RicardoC
Occasional Contributor
2 years agoHi Jingyang,
Thank you for the response. This is how it is configured:
It is a bit different that what you mentioned. Does it look OK?
Thank you,
Ricardo