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Altera_Forum
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8 years ago

EMIF oct_rzqin compile error!

Hi, I have generated a Qsys design of NIOS + EMIF(DDR4), when running synthesis in Quartus Prim Pro v17.0, it reports error: Error(17044): Illegal connection on I/O input buffer primitive ...
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Altera_Forum
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7 years ago

if you are probing that signal with sigtap , it may cause you a problem

so delete it from sigtap