Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHi,
From datasheet it is clear that 1.Clock is required before EM213OL powered ON or You need to rest the device to allow the controller to synchronize with the new external clock. Which will cause Toggling VOUT. This may affect the regulator output voltage which intern affect the clock output from FPGA.Not recommended. Why you required sync from FPGA can you elaborate? Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)