Dual-port on-chip memory for two nios communication

Hi, Taha

You can implement the dual-port RAM to be one write port and one read port. One Nios write the sinus data to the write port, and the other Nios read it from the read port.

The write and read ports can be implemented by using a single clock, or separate clocks.

Please refer to below for implementation:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ram_rom.pdf

You may use pointer to the variable in the dual port RAM.

Thanks.

Eric