Hi John,
the dual configuration IP is controlled by a state machine. Both are running at the same 40 MHz clock. The PLL is generating two clocks, the second one is the 40 MHz and is used for the state machine and the dual configuration IP. It is the pll1|clk[1] in the sdc file.
This means the the state of the state machine is updated on the rising edge of the input clock.
Can you tell me if the line in the sdc file is correct?
create_generated_clock -name ru_clk -divide_by 2 -master_clock PLL|altpll_component|auto_generated|pll1|clk[1] -source [get_pins -compatibility_mode { *altera_dual_boot:dual_boot_0|alt_dual_boot_avmm:alt_dual_boot_avmm_comp|alt_dual_boot:alt_dual_boot|ru_clk|clk }] [get_pins -compatibility_mode { *altera_dual_boot:dual_boot_0|alt_dual_boot_avmm:alt_dual_boot_avmm_comp|alt_dual_boot:alt_dual_boot|ru_clk|q } ]
I am sorry but I can't post the source code here in the forum.
I will try to describe the state sequence here. Every item is one state, equals to one clock cycle (25 ns).
(Not named inputs in the states are set to zero)
The inital sequence of the states, that did not work for all devices...
- ...
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='0'
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='1'
- avmm_rcv_address="011", avmm_rcv_read='1'
- avmm_rcv_address="011", avmm_rcv_read='1' (avmm_rcv_readdata(0) is checked here, but because it is always zero, it makes no difference if it is checked or not)
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='0' where idx is 0 to 3
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='1' where idx is 0 to 3 and of course the same value as in the state before
- avmm_rcv_address="011", avmm_rcv_read='1'
- avmm_rcv_address="011", avmm_rcv_read='1', repeat this state till avmm_rcv_readdata(0)='0'
- ...
What leads to the same result, as checking the busy flag (does not work for all devices)
- ...
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='0'
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='1'
- IDLE state (all set to zero)
- IDLE state
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='0' where idx is 0 to 3
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='1' where idx is 0 to 3 and of course the same value as in the state before
- avmm_rcv_address="011", avmm_rcv_read='1'
- avmm_rcv_address="011", avmm_rcv_read='1', repeat this state till avmm_rcv_readdata(0)='0'
- ...
What seems to work
- ...
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='0'
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='1'
- IDLE state (all set to zero)
- IDLE state
- IDLE state
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='0' where idx is 0 to 3
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='1' where idx is 0 to 3 and of course the same value as in the state before
- avmm_rcv_address="011", avmm_rcv_read='1'
- avmm_rcv_address="011", avmm_rcv_read='1', repeat this state till avmm_rcv_readdata(0)='0'
- ...
What does not work for any of the devices
- ...
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='0'
- avmm_rcv_address="000", avmm_rcv_writedata(0)='1', avmm_rcv_write='1'
- IDLE state (all set to zero)
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='0' where idx is 0 to 3
- avmm_rcv_address="010", avmm_rcv_writedata(idx)='1', avmm_rcv_write='1' where idx is 0 to 3 and of course the same value as in the state before
- avmm_rcv_address="011", avmm_rcv_read='1'
- avmm_rcv_address="011", avmm_rcv_read='1', repeat this state till avmm_rcv_readdata(0)='0'
- ...