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Honored Contributor
Honored ContributorDriving DCLK pin after FPGA configuration
Hi, We are using 10CL016 FPGA and configuring it in Passive serial mode from a Host processor. The SPI clock is connected to the DCLK pin of FPGA. We need to use the Host SPI interface eve...
Altera_ForumHonored Contributor
Honored ContributorHello Alex,
Could you please confirm that "drive" specifically includes the concepts "clock" and "toggle", and that you not only mean "drive statically (EITHER continuously '0' OR continuously '1')"?
